High Throughput, Low Area and Low Power Distributed Arithmetic Formation for Adaptive Fir Filter

Authors:K. RANI, K. JOSHNA

0445-0449

Radix-4 And Radix-8 Booth Encoded Multi-Modulus Multipliers

Authors:G. V. R. SAGAR, B. GAYATHRI

0450-0454

Lifting DWT Based Lsb Steganography By Reconfigurable Processor

Authors:M. KISHORE KUMAR, ABDUL KHAJA PASHA, K. ASHOK BABU

0455-0460

Cryptographic Based AES Encrypition and Decrypition Algorithm Implemention on FPGA

Authors:T. PARVATHI, MADDIREDDY SOWJANYA, K. ASHOK BABU

0461-0464

Clock Tree Synthesis Analysis and Optimization in Physical Design Flow of Serial Peripheral Interconnect (SPI)

Authors:PEDDI ANUSHA, K.SATISH BABU

0465-0471

Efficient Scan Chain Architecture for APB Bridge Based on AMBA 4.0

Authors:SAMREEN SULTHANA, V.V.N.S SUDHA

0472-0479

Ultra Low Voltage Process Variation Tolerant Schmitt Trigger based SRAM Design

Authors:SINDHURI.M, L.AHRUTHI

0480-0487

VHDL Implementation of All Digital OFDM Modulator And Demodulator for FPGA Based Applications

Authors:LIBIN BABU DANIEL 1, A.SAIKUMAR GOUD , M.GURUNADHA BABU, DR.N.V.KOTESWARA RAO

0488-0493

Design and Implementation of Digital Adaptive Filter on Spartan-6 FPGA for ECG Signal Processing

Authors:V. ARCHANA PRIYA, M. MURALIDHAR

0494-0498

Multicarrier Systems Based on Multistage Layered IFFT Structure

Authors:M.LAKSHMI SAI, K.SARADA

0499-0503